JOB POSTING INFORMATION
Position Type:	Professional Experience Year Co-op (PEY Co-op: 12-16 months)
Job Title:	Software Engineering Intern: High-level Synthesis Compiler
Job Location:	Toronto, ON
Job Location Type:	On-Site
If working on site, can you provide a copy of your COVID-19 safety protocols?:	No
Number of Positions:	5
Salary:	Salary Not Available, 0.0 hours per week
Start Date:	05/06/2024
End Date:	08/22/2025
Job Function:	Research
Job Description:	Microchip’s FPGA software engineering team develops the Electronic Design Automation (EDA) software used by our customers to program Microchip FPGAs. Customers perform their entire FPGA design flow using our software: from design entry, to synthesis, through place-and-route, timing, power analysis, and simulation. The High-Level Synthesis (HLS) software engineering group develops the next-generation system-level design software that involves development of a range of tools, from IDEs to software libraries to compilers. One component of this is Microchip’s high-level synthesis compiler. High-level synthesis allows our customers to program FPGAs using the C/C++ software language. The HLS compiler originally started as a University of Toronto research project (LegUp) that was successfully commercialized by the LegUp Computing startup and acquired by Microchip in 2020. Customers who program FPGAs using the C/C++ language are significantly more productive because C/C++ has a higher level of abstraction than traditional low-level FPGA languages like Verilog/VHDL. Customers achieve shorter design times, easier verification, and faster time-to-market using high-level synthesis. We are also completely redesigning our software development IDE from scratch to build on top of the new Eclipse Theia IDE (based on VSCode). The Eclipse Theia IDE has been developed using modern web technologies (TypeScript, React, HTML, CSS). As a software engineer in the High-Level Synthesis group, you will work on cutting-edge high-level synthesis compiler software with the original architects of the HLS compiler and industry-leading experts. You will be joining an agile fast-paced engineering team, where you will solve highly challenging problems. You will have ownership over meaningful new software projects from inception to development, testing, writing user documentation, and releasing to Microchip FPGA customers. The software engineering team is based in Toronto. The Microchip office is in the downtown financial core at 67 Yonge Street, only a 10-minute walk from Union Station. Interns will work in-person from our office 5 days a week. Example Responsibilities: IDE Develop Theia IDE extensions in object-oriented Typescript using Theia core’s objects and InversifyJS to perform dependency injection. Perform UI/UX design using the React framework and CSS styles to make the IDE easy to understand and use. Compiler Contribute to our state-of-the-art high-level synthesis compiler to generate high-performance FPGA hardware from a C/C++ algorithmic description. Our high-level synthesis software is built on the open-source LLVM compiler infrastructure. Develop and improve LLVM compiler transformation and analysis passes for targeting FPGAs. Optimize the HLS-generated hardware architecture to improve the quality of the generated hardware circuit (Fmax and area). Investigate complex real-life customer applications designed with high-level synthesis to optimize performance/area and implement new HLS features as required. Design HLS-optimized libraries for computer vision (OpenCV), math functions, machine learning, and digital signal processing filters.
Job Requirements:	Minimum Qualifications: Excellent programming skills. Experienced in C/C++, python, or Typescript/Javascript, React, and HTML/CSS. Knowledge and interest in compilers. Strong knowledge of algorithms and data structures. Preferred Qualifications: Experience working with the LLVM compiler is a definite plus. Experience working with VSCode/Theia plugins/extensions and UI/UX design are a definite plus. Strong knowledge of digital design and in-depth working experience with FPGAs. Exposure to high-level synthesis tools. Experience with Git source code version control. Experience with shell scripting languages (Python, Perl, Bash, TCL). Comfortable with large-scale software development in both Linux and Windows environments.
Preferred Disciplines:	Computer Engineering Computer Science Electrical Engineering Engineering Science (Electrical and Computer) Engineering Science (Machine Intelligence)
All Co-op programs:	No
Targeted Co-op Programs:	Targeted Programs Professional Experience Year Co-op (12 - 16 months)

APPLICATION INFORMATION
Application Deadline:	Oct 6, 2023 09:00 AM
Application Receipt Procedure:	Online via system
U of T Job Coordinator:	Ryan Hand

ORGANIZATION INFORMATION
Organization:	Microchip Technology
Division:	FPGA R&D Software Engineering
Website:	www.microchip.com

ADDITIONAL INFORMATION
Length of Workterm:	FIXED PEY Co-op: 16 months